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PINAPA: An Extraction Tool for SystemC Descriptions of Systems-on-a-Chip ∗† Matthieu Moy [removed]
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Document Date: 2005-09-08 19:36:32

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File Size: 188,67 KB

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Jersey City / Reading / /

Company

Cadence Design Systems / Pinapa / SystemC / IEEE Computer Society Press / ARM Limited. / System Platforms Group / Texas Instruments / Philips / STMicroelectronics / Actis Design LLC / Intel / Edison Design Group / /

Country

France / United States / /

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USD / /

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Facility

CoCentric System Studio / TLM library / Synopsys Inc. CoCentric System Studio / University of Bremen / SystemC library / /

IndustryTerm

simulation tools / software parts / visualization tools / vizualization tool / software reuse / heterogeneous systems / verification tools / heterogeneous hardware/software systems / online documentation / software development / lint tool / systems-on-a-chip / formal verification tool / lint tools / equivalent tool / embedded software / analysis tools / software descriptions / visualization tool / http /

OperatingSystem

GNU / /

Organization

US Federal Reserve / University of Bremen / /

Person

Laurent Maillet-Contoz / Markus Noga / Florence Maraninchi Laurent / /

Position

existing C++ interpreter / graphical editor / interpreter / SoC designer / Hardware description languages General / netlist extractor / representative / C++ interpreter / GNU Lesser General Public License / model the low-level communication / programmer / verilog synthesizable subset translator / /

Product

LusSy / /

ProgrammingLanguage

XML Schema / XML / Verilog / C++ / /

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New Jersey / /

Technology

XML / perl / html / VHDL / pdf / Verilog / Mixed Information technologies / simulation / network protocols / GUI / /

URL

http /

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