PINAPA: An Extraction Tool for SystemC Descriptions of Systems-on-a-Chip ∗† Matthieu Moy [removed]

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Date: 2005-09-08 19:36:32 Logic design Electronic design automation SystemC Transaction-level modeling NCSim CPU design E Verilog VHDL Electronic engineering Hardware description languages Hardware verification languages		PINAPA: An Extraction Tool for SystemC Descriptions of Systems-on-a-Chip ∗† Matthieu Moy [removed] Add to Reading List Source URL: www-verimag.imag.fr Download Document from Source Website File Size: 188,67 KB Share Document on Facebook