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Date: 2015-02-24 17:15:57Integrated circuits Hardware verification languages Synopsys Mentor Graphics Magma Design Automation Cadence Design Systems Electronic design automation Integrated circuit design SystemVerilog Electronic engineering Electronics Electronic design | UNITED STATES SECURITIES AND EXCHANGE COMMISSION Washington, D.C[removed]FORM 10-K (Mark One)Add to Reading ListSource URL: www.synopsys.comDownload Document from Source WebsiteFile Size: 281,12 KBShare Document on Facebook |