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61	Nov. 17, 1959 E. BEREZIN 2,913,176 Add to Reading List Source URL: patentimages.storage.googleapis.com Language: English - Date: 2013-08-01 03:00:53 Pulse Computer architecture Electronic circuits Intel Datapath Electronic engineering Electronics Central processing unit
62	The Expensive von Neumann Paradigm: is its Predominance still Tolerable? Reiner Hartenstein, IEEE fellow, TU Kaiserslautern http://hartenstein.de/RH-bio.pdf Abstract. Mainly three different highly problematic issues come Add to Reading List Source URL: hartenstein.de Language: English - Date: 2010-04-28 03:24:57 Electronics Parallel computing Computer architecture Central processing unit Systolic array Reconfigurable datapath array High-performance reconfigurable computing Field-programmable gate array Programming paradigm Reconfigurable computing Computing Electronic engineering
63	A FPGA based Forth microprocessor P. H. W. Leong, P. K. Tsang and T. K. Lee Department of Computer Science and Engineering The Chinese University of Hong Kong Shatin, N.T. Hong Kong Systems which employ a microprocessor Add to Reading List Source URL: www.cse.cuhk.edu.hk Language: English - Date: 2007-03-29 21:09:02 Stack machine Instruction set Field-programmable gate array Datapath Reduced instruction set computing Instruction set architectures PicoBlaze X86 assembly language Computer architecture Central processing unit Computer hardware
64	Datapath Ltd Directions to the Head Office, Technical Support and General Sales Enquiries Datapath Ltd Bemrose House Bemrose Park Wayzgoose Drive Add to Reading List Source URL: www.datapath.co.uk Language: English - Date: 2013-06-24 08:48:41 Roads in England M1 motorway Chaddesden Dual carriageway Derby A6 road M5 motorway Counties of England Transport in England Geography of England
65	Nios II Custom Instruction User Guide Nios II Custom Instruction User Guide 101 Innovation Drive Add to Reading List Source URL: www.altera.com Language: English - Date: 2011-02-01 21:44:38 Electronic engineering Nios II Field-programmable gate array Sopc builder Instruction set Nios embedded processor Datapath Computer architecture Computer hardware Central processing unit
66	Xilinx XAPP503, SVF and XSVF File Formats for Xilinx Devices, Application Note Add to Reading List Source URL: www.xilinx.com Language: English - Date: 2013-03-04 06:00:09 Electronic engineering Serial Vector Format Joint Test Action Group Boundary scan Xilinx Datapath Electronics manufacturing Manufacturing Electronics
67	Pendulum: A Reversible Computer Architecture by Add to Reading List Source URL: dspace.mit.edu Language: English - Date: 2008-03-11 00:52:03 Computer architecture Central processing unit Microprocessors Models of computation Reversible computing Instruction set Datapath Pendulum Computer Computer hardware Digital electronics Electronic engineering
68	PDF Document Add to Reading List Source URL: none.cs.umass.edu Language: English - Date: 2009-09-02 15:53:39 Central processing unit Assembly languages Instruction cycle LC-3 Instruction set Memory data register Datapath Stack machine Computer architecture Computer hardware Computing
69	PDF Document Add to Reading List Source URL: hartenstein.de Language: English - Date: 2005-04-27 00:51:08 Computer architecture Central processing unit Integrated circuits Reconfigurable datapath array Field-programmable gate array Programmable logic device Parallel computing CPU design Data stream Electronic engineering Electronics Reconfigurable computing
70	PDF Document Add to Reading List Source URL: atrak.usc.edu Language: English - Date: 2002-07-23 17:31:53 Central processing unit Microprocessors Microarchitecture Datapath Register file Parallel computing Cell Multi-core processor Superscalar Computer architecture Computer engineering Computer hardware