Back to Results
First PageMeta Content
Electronic design / Integrated circuits / Field-programmable gate array / Logic synthesis / Application-specific integrated circuit / High-level synthesis / Synopsys / FPGA prototype / Integrated circuit design / Electronic engineering / Electronics / Electronic design automation


Success Story Synopsys and STMicroelectronics High-Level Synthesis Flow Achieves Higher Reliability and Productivity for Multi-rate Digital IF TV ASIC
Add to Reading List

Open Document

File Size: 167,60 KB

Share Result on Facebook

Company

ST / RTL / Synopsys Inc. / STMicroelectronics / System-Level Design Solutions / /

Country

United States / /

IndustryTerm

multimedia convergence solutions / technology characterization / multimedia convergence technology solutions / multi-rate digital signal processing / Internet TV / real-time digital signal processing algorithms / /

Organization

FPGA / ASIC / /

Person

François Rémond / /

Position

Using Synplify Premier / leader / Designer / TV & Monitor Division / Director / Home Entertainment & Displays Group / Synplify Premier / demodulator ASSP Premier / /

Product

65nm Early FPGA Prototyping / Synphony Model Compiler / /

ProgrammingLanguage

Simulink / /

Technology

semiconductor / FPGA / ADC / ASIC / real-time digital signal processing algorithms / multi-rate DSP algorithm / ASIC technology / simulation / DSP / DSP algorithm / FPGA technology / CAD / /

URL

www.synopsys.com / http /

SocialTag