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Technology / Three-dimensional integrated circuit / Wafer / Through-silicon via / Fraunhofer Society / Fraunhofer Group for Microelectronics / Integrated circuit / Flip chip / Semiconductor device fabrication / Electronics / Microtechnology


F R A U N H O F E R I N S T I T U T E F o R R e l ia b i l it y an d M i C roin T e g ration I Z M Fraunhofer IZM – ASSID All Silicon System Integration Dresden All Silicon System
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Document Date: 2015-04-01 11:41:42


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City

Dresden / Moritzburg / Berlin / /

Company

MCC GmbH / Fraunhofer IZM Press / 3D Integrated Systems / 3D WL-SIP 3D HETEROMULTI-SENSOR GeNEOUS SYSTEMS / /

Continent

Europe / /

Country

Germany / /

/

Facility

All Silicon System Integration Dresden Fraunhofer IZM-ASSID Fraunhofer IZM The Fraunhofer Institute / Fraunhofer IZM facility / /

IndustryTerm

active circuit devices / Main technology tasks / thin wafer handling technologies / thin wafer processing / stress relief technologies / transportation / integrated passive devices / microelectronic products / line manufacturing / technology development / ultra-thin chips / technology tasks / passive and interconnect technologies / healthcare / interconnection technologies / low-temperature assembly technologies / industrial and scientific networks / technology number / integrated active devices / related metrology tools / 3D integration technologies / assembly technologies / active and passive devices / smart systems / industry-compatible process equipment / industrial electronics / 3D systems / post-processing / prototyping services / manufacturing / customer-specific solutions / WIRELESS SENSOR NODES WLP Opto Package Chip / 3D smart systems / passive devices / metal films / system integration technologies / multi-functional electronic devices / /

Organization

Redistribution Assembly / Fraunhofer Institute for Reliability and Microintegration / European Commission / Federal Ministry of Education / /

Person

Klaus-Dieter Lang / Jürgen Grafe / Mathias Böttcher / /

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Position

Director / Head of Division / /

Product

3D SIP ELECTR./OPT / /

Technology

developing 3D integration technologies / ultra-thin chips / system integration technologies / stress relief technologies / 4 technologies / High-density Cu-TSV technology / integrated circuits / thin wafer handling technologies / passive and interconnect technologies / dielectric / interconnection technologies / IC/IP STACKS 3D IP-SiP WIRELESS SENSOR NODES WLP Opto Package Chip / assembly technologies / low-temperature assembly technologies / /

URL

www.izm.fraunhofer.de / www.3D-integration.fraunhofer.de / www.izm.fraunhofer.de/assid / /

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