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IEEE standards / Reconfigurable computing / Field-programmable gate array / Hardware emulation / Futurebus / Emulator / Xilinx / CPU cache / SiliconBlue Technologies / Electronic engineering / Computer hardware / Electronics
Date: 2005-03-07 23:35:27
IEEE standards
Reconfigurable computing
Field-programmable gate array
Hardware emulation
Futurebus
Emulator
Xilinx
CPU cache
SiliconBlue Technologies
Electronic engineering
Computer hardware
Electronics

Appeared in FPGA’95 The Design of RPM: An FPGA-based Multiprocessor Emulator Koray Öner, Luiz A. Barroso, Sasan Iman, Jaeheon Jeong, Krishnan Ramamurthy and Michel Dubois Department of Electrical Engineering - System

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