| Document Date: 2009-10-21 14:03:34
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City virtual channel / / Company Computer Sciences / Computer-Communication Networks / RTL / Intel / / / Facility port M / Store Forwarding / Computer Sciences The University of Texas / Store Queues Franziska Roesner / / IndustryTerm large-window processor / routed operand network / skid buffer solution / operand network / associative search filtering / associative search / low energy / experimental infrastructure / bank prediction / largewindow processors / large-window processors / mesh-routed operand network / target bank / bank conflicts / bank overflows / memory bank predictors / 8KB/bank / on-chip memory network / memory disambiguation hardware / classic network flow-control solutions / conventional processors / interconnection network / kilo-window processors / partitioned memory systems / bank / classic network / mesh network / interconnection networks / virtual network / largewindow processor / prototype processor / energy overheads / baseline network / superscalar processors / / MarketIndex SPEC / EEMBC / CAM / IPC 40 / / Organization University of Texas at Austin / SQ / ASIC / Computer Systems Organization / / Person Rashid / Stephen W. Keckler / Joel S. Emer Doug Burger Stephen / Huang / Sha / / Position Packet-switching networks General / / ProgrammingLanguage C / / ProvinceOrState Texas / Oregon / / Technology Alpha / TRIPS processor / RAM / ALU OPN Router LSQ Partition ALU LSQ Partition OPN Router Flush OPN Router / TLB DP TLB DP TLB DP TLB MHU FU MHU Network Router / 1 / 024-instruction window TRIPS processor / largewindow processors / large-window processor / large / kilo-window processors / distributed / large-window processor / ASIC / large-window processors / 25 routers / flow control / largewindow processor / network routers / Simulation / TRIPS prototype processor / network router / flash / 5.2 Large-window Processor / /
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Late-Binding: Enabling Unordered Load-Store Queues Franziska Roesner x Simha Sethumadhavan x y x Joel S. Emer