![Computer memory / Computer networking / Networking hardware / Cell / Throughput / Multi-core processor / Memory bandwidth / Content-addressable memory / Router / Computing / Computer hardware / Computer architecture Computer memory / Computer networking / Networking hardware / Cell / Throughput / Multi-core processor / Memory bandwidth / Content-addressable memory / Router / Computing / Computer hardware / Computer architecture](https://www.pdfsearch.io/img/f86d342cda974f0051f286b7bf898685.jpg) Date: 2013-12-04 11:29:33Computer memory Computer networking Networking hardware Cell Throughput Multi-core processor Memory bandwidth Content-addressable memory Router Computing Computer hardware Computer architecture | | 404 IEEE JOURNAL ON SELECTED AREAS IN COMMUNICATIONS, VOL. 19, NO. 3, MARCH 2001 Design Issues for High-Performance Active Routers Tilman Wolf and Jonathan S. Turner, Fellow, IEEEAdd to Reading ListSource URL: www.ecs.umass.eduDownload Document from Source Website File Size: 199,43 KBShare Document on Facebook
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