Vector Lane Threading S. Rivoire, R. Schultz, T. Okuda, C. Kozyrakis Computer Systems Laboratory Stanford University

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• Central processing unit
• Computer architecture
• Parallel computing
• Computing
• Computer engineering
• Vector processor
• Data parallelism
• Vector
• Microarchitecture

2009 Edition Page 253 CHAPTER 2G. PREFERENTIAL AND MANAGED LANE SIGNS Section 2G.01 Scope

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• Transport
• Land transport
• Road transport
• Road traffic management
• Sustainable transport
• Types of roads
• Road safety
• High-occupancy vehicle lane
• Lane
• Managed lane
• Reversible lane
• Traffic

Vector Lane Threading Suzanne Rivoire, Rebecca Schultz, Tomofumi Okuda†, Christos Kozyrakis Electrical Engineering Department Stanford University {rivoire,rschultz,tokuda,kozyraki}@stanford.edu 8

Source URL: rivoire.cs.sonoma.edu

• Computer architecture
• Concurrent computing
• Computing
• Parallel computing
• Central processing unit
• Flynn's taxonomy
• Microprocessors
• Superscalar processor
• SIMD
• Vector processor
• Scalar processor
• Automatic vectorization

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