Massively parallel processor array

Results: 18



#Item
1Computing / Parallel computing / Computer architecture / Manycore processors / Digital signal processing / Microprocessors / Massively parallel processor array / Multi-core processor / Xeon Phi / Massively parallel / Digital signal processor / Very long instruction word

® Kalray MPPA Massively Parallel Processor Array Revisiting DSP Acceleration with the Kalray MPPA Manycore Processor Benoît Dupont de Dinechin, CTO

Add to Reading List

Source URL: www.hotchips.org

Language: English - Date: 2015-08-21 02:18:26
2Computing / Computer architecture / Electronic engineering / VHDL / ModelSim / Field-programmable gate array / ARC / Synopsys / Router

Transactor-based debugging of massively parallel processor array architectures Markus Blocherer, Srinivas Boppu, Vahid Lari, Frank Hannig, Jürgen Teich Hardware/Software Co-Design University of Erlangen-Nuremberg

Add to Reading List

Source URL: www.mad-workshop.de

Language: English - Date: 2016-03-22 12:43:37
3Computing / Parallel computing / Fabless semiconductor companies / Reconfigurable computing / Xilinx / Field-programmable gate array / Soft microprocessor / Multi-core processor / Altera

GRVI Phalanx: A Massively Parallel RISC-V FPGA Accelerator Accelerator Jan Gray Gray Research LLC, Bellevue, WA, USA Abstract— GRVI is an FPGA-efficient RISC-V RV32I soft

Add to Reading List

Source URL: fpga.org

Language: English - Date: 2016-05-03 18:21:31
4Parallel computing / Manycore processors / Reconfigurable computing / Computer architecture / Microprocessors / Multi-core processor / Massively parallel processor array / Tilera / Adapteva / Benchmark / TILE64 / CPU cache

Institut für Technische Informatik und Kommunikationsnetze Computer Engineering and Networks Laboratory Prof. L. Thiele

Add to Reading List

Source URL: www.tik.ee.ethz.ch

Language: English - Date: 2016-02-29 10:12:36
5Computing / Parallel computing / Manycore processors / Computer hardware / Reconfigurable computing / Computer architecture / Microprocessors / Multi-core processor / Massively parallel processor array / Adapteva / TILE64 / Tilera

Institut für Technische Informatik und Kommunikationsnetze Computer Engineering and Networks Laboratory Prof. L. Thiele

Add to Reading List

Source URL: www.tik.ee.ethz.ch

Language: English - Date: 2015-11-10 10:25:22
6Computing / Parallel computing / Mixed criticality / Multi-core processor / Manycore processor / Thread / Massively parallel processor array / Computer cluster / Scheduling / Cache memory

Real-Time Systems manuscript No. (will be inserted by the editor) Mixed-Criticality Scheduling on Cluster-Based Manycores with Shared Communication and Storage Resources Georgia Giannopoulou · Nikolay Stoimenov ·

Add to Reading List

Source URL: www.tik.ethz.ch

Language: English - Date: 2015-07-22 10:25:28
7Graphics hardware / Parallel computing / Electronics / Computer architecture / Video cards / Graphics processing unit / Massively parallel processor array / CUDA / OpenCL / GPGPU / Computing / Computer hardware

Kalray Accelerated Computing v2

Add to Reading List

Source URL: anciens-amis-cnrs.com

Language: English - Date: 2015-05-27 09:27:22
8Computer programming / Multi-core processor / Application software / Scilab / Embedded system / Software / Parallel computing / Computing / Massively parallel processor array

Systems design 2012_Mise en page:48 Page216 Software engineering MANYCORELABS

Add to Reading List

Source URL: www.teratec.fr

Language: English - Date: 2014-04-03 05:07:18
9Massively parallel processor array / Missoula /  Montana / Missoula / Hotel / Buffet / Hospitality industry / Tourism / Geography of the United States / Hilton Hotels Corporation / Hotel chains / Doubletree

2015 MPPA/MACOP Conference May 26 – 28, 2015 DoubleTree by Hilton Missoula, Montana

Add to Reading List

Source URL: www.macop.com

Language: English - Date: 2015-02-26 15:13:05
10Electronics / Digital electronics / Digital signal processing / Reconfigurable computing / Massively parallel processor array / Field-programmable gate array / Supercomputers / Multi-core processor / Array / Computing / Electronic engineering / Parallel computing

This is the author’s version of the work. The definitive work was published in Proceedings of the 17th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2009), 2009. FSM-Controlled Architectu

Add to Reading List

Source URL: www12.informatik.uni-erlangen.de

Language: English - Date: 2009-10-28 16:18:44
UPDATE