![Central processing unit / Computer architecture / CPU cache / Cache / Oram / Dynamic random-access memory / B-tree / Microarchitecture / Computer hardware / Computer memory / Computing Central processing unit / Computer architecture / CPU cache / Cache / Oram / Dynamic random-access memory / B-tree / Microarchitecture / Computer hardware / Computer memory / Computing](https://www.pdfsearch.io/img/93ec9e82129d588a0a90dee0b8e6fd65.jpg) Date: 2013-04-22 20:42:08Central processing unit Computer architecture CPU cache Cache Oram Dynamic random-access memory B-tree Microarchitecture Computer hardware Computer memory Computing | | Design Space Exploration and Optimization of Path Oblivious RAM in Secure Processors Ling Ren, Xiangyao Yu, Christopher W. Fletcher ∗, Marten van Dijk and Srinivas Devadas MIT CSAIL, Cambridge, MA, USA {renling, yxy, cAdd to Reading ListSource URL: people.csail.mit.eduDownload Document from Source Website File Size: 2,78 MBShare Document on Facebook
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