Manuscript to Appear in the 2005 International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA’05), June 2005, Las Vegas, Nevada. Copyright and all rights therein are retained by au - Parallel array - Document - PDFSEARCH.IO

First Page	Meta Content
	Manuscript to Appear in the 2005 International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA’05), June 2005, Las Vegas, Nevada. Copyright and all rights therein are retained by au Add to Reading List Document Date: 2005-04-26 16:43:41 Open Document File Size: 204,88 KB Share Result on Facebook City Las Vegas / Discrepancy Mirror / Coding / / Company Xilinx Inc. / 10th IEEE Intl / Discrepancy Mirrors / Reliable Computer Systems / / Event Product Issues / / Facility Computer Engineering University of Central Florida Orlando / / IndustryTerm micron minimum width technology / triple modular redundant systems / / Organization University of Central Florida / Electrical and Computer Engineering University / IEEE Computer Society / C. A. Sharma Department of Electrical / / Product ModelSim-II / resource / resources / / ProgrammingLanguage FL / / ProvinceOrState Nevada / Florida / / PublishedMedium IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems / / Region Central Florida / / Technology FPGA / 1.5 micron minimum width technology / 2 No Algorithm / Simulation / Integrated Circuits / CAD / / SocialTag Electronic design Logic gates Digital electronics Field-programmable gate array XOR gate Redundancy Xilinx XNOR gate Fault detection and isolation Electronic engineering

Manuscript to Appear in the 2005 International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA’05), June 2005, Las Vegas, Nevada. Copyright and all rights therein are retained by auAdd to Reading List