Date: 2009-07-09 02:20:06Boolean algebra Diagrams Field-programmable gate array Binary decision diagram Lookup table Xilinx Multiplexer Artificial neuron Function Computing Mathematics Electronic engineering | | LUTMIN: FPGA Logic Synthesis with MUX-Based and Cascade Realizations Tsutomu Sasao 1 and Alan Mishchenko[removed]Dept. of Computer Science and Electronics, Kyushu Institute of Technology, Iizuka[removed], JapanDocument is deleted from original location. Use the Download Button below to download from the Web Archive.Download Document from Web Archive File Size: 385,76 KB
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