Magic: An Industrial-Strength Logic Optimization, Technology Mapping, and Formal Verification System Alan Mishchenko Niklas Een Robert Brayton Stephen Jang Maciej Ciesielski

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Date: 2010-03-19 22:25:46 Digital electronics Integrated circuits Standard cell Field-programmable gate array Logic optimization Retiming Physical design Logic synthesis Placement Electronic engineering Electronic design automation Electronic design		Magic: An Industrial-Strength Logic Optimization, Technology Mapping, and Formal Verification System Alan Mishchenko Niklas Een Robert Brayton Stephen Jang Maciej Ciesielski Add to Reading List Source URL: www.bvsrc.org Download Document from Source Website File Size: 177,40 KB Share Document on Facebook

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