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Field-programmable gate array / Place and route / Placement / Xilinx / Application-specific integrated circuit / Physical design / Standard cell / Logic synthesis / Routing / Electronic engineering / Electronic design automation / Electronics


1997 International Workshop on Field Programmable Logic and Applications VPR: A New Packing, Placement and Routing Tool for FPGA Research1 Vaughn Betz and Jonathan Rose Department of Electrical and Computer Engineering,
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Document Date: 1999-12-10 09:14:26

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File Size: 38,61 KB

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Company

Xilinx Inc. / Altera Inc. / L. McMurchie S. A. / Actel Inc. / AT & T Inc. / Lucent Technologies / /

Country

United States / /

Currency

USD / /

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Facility

Microelectronics Centre / Information Technology Centre / University of Toronto Toronto / University of Toronto / square FPGA / /

IndustryTerm

technology-mapped netlists / placement tool / technology map / published tools / simulated annealing algorithm / congestion algorithm / route tools / http /

MarketIndex

MCNC / /

Organization

University of Toronto Toronto / Microelectronics Centre of North Carolina / Centre of Ontario / University of Toronto / Jonathan Rose Department of Electrical and Computer Engineering / /

Person

C. D. Gelatt / Jr. / Vaughn Betz / Cooling Schedule / S. Kirkpatrick / M. P. Vecchi / Jonathan Rose / /

Position

representative / General / /

ProvinceOrState

North Carolina / Ontario / /

Technology

FPGA / simulated annealing algorithm / Cav / Information Technology / congestion algorithm / maze router / 3 Placement Algorithm / Pathfinder algorithm / SRAM / 4 Routing Algorithm / FPGA routers / CAD / /

URL

http /

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