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-17 March 9, 2002 An Efficient C++ Framework for Cycle-Based Simulation J.P. Grossman
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Document Date: 2002-08-16 14:55:21

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City

Norwell / /

Company

Sixth / CoWare / Synopsys / Frontier / /

Country

United States / /

Facility

Computer Science Massachusetts Institute of Technology Cambridge / Stanford University / /

IndustryTerm

hardware systems / 32x32 2D grid network / target hardware / transistor 3D graphics processor / heavy machinery / internal tool / high-level software simulation / /

MarketIndex

LRU / FPGA / LFSR / /

Movie

The Right Stuff / /

Organization

Institute of Technology Cambridge / Stanford University / Aries Technical Memo ARIES-TM-17 Artificial Intelligence Laboratory Department of Electrical Engineering / Massachusetts Institute of Technology / /

Person

Heinrich Meyr / Dinesh Ramanathan / Guido Arnout / Andreas Wieferink / Andrea Kroll / Steve Tjiang / Stan Liao / Tim Kogel / Rajesh Gupta / Ray Roth / /

/

Position

appropriate model for hardware components / simulation model / programming interface and debugging features / producer / programmer / /

ProgrammingLanguage

Verilog / C++ / /

SportsLeague

Stanford University / /

Technology

semiconductor / FPGA / Verilog / artificial intelligence / 100 million transistor 3D graphics processor / Simulation / 3D Graphic Processor / VHDL / /

URL

http /

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