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Digital electronics / Electronic design / Formal methods / And-inverter graph / Retiming / Logic synthesis / Automatic test pattern generation / Field-programmable gate array / Sequential logic / Electronic engineering / Electronics / Electronic design automation


Integrating Logic Synthesis, Technology Mapping, and Retiming Alan Mishchenko Satrajit Chatterjee Robert Brayton
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Document Date: 2006-05-01 16:05:11

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File Size: 240,51 KB

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