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Verilog-AMS
Results: 27

#	Item
1	CS:APP2e Web Aside ARCH:VLOG Verilog Implementation of a Pipelined Y86 Processor∗ Randal E. Bryant David R. O’Hallaron June 5, 2012 Add to Reading List Source URL: csapp.cs.cmu.edu Language: English - Date: 2012-06-05 05:37:00 Hardware description languages Electronic design automation Verilog Digital electronics Field-programmable gate array High-level synthesis Verilog-AMS SystemVerilog
2	Safety to the Weak! Security Through Feebleness: An Unorthodox Manifesto Rick McGeer, US Ignite Outline Add to Reading List Source URL: spw16.langsec.org Language: English - Date: 2016-06-05 23:40:05 Hardware description languages Turing machine Formal methods Theoretical computer science Verilog VHDL Turing completeness NP Formal verification High-level synthesis Verilog-AMS
3	Product Line High-Performance Simulator for Mixed Language Designs IEEE VHDL, SystemVerilog, Verilog-AMS, SystemC/C/C++ Verification Ecosystem Add to Reading List Source URL: www.aldec.com Language: English - Date: 2015-07-31 14:44:56
4	Modeling Skin Effect in Inductors Add to Reading List Source URL: www.designers-guide.org Language: English - Date: 2008-06-02 18:38:58 Hardware description languages Inductor Verilog-AMS Electrical impedance Verilog-A Ken Kundert Electrical resonance SPICE Electrical element Electronic engineering Electromagnetism Electronics
5	Saber Aerospace Overview Proven Robust Design Solution for Aerospace Mechatronic Systems Saber ® is the proven standard for mechatronic system design and verification. Aerospace design teams worldwide use Saber to devel Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2015-01-29 15:47:57 VHDL-AMS Synopsys Reliability engineering VHDL SystemC SPICE Verilog Aerospace engineering Modeling language Electronic engineering Hardware description languages Electronic design automation
6	Datasheet VCS AMS Mixed-Signal Verification Solution Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2015-04-29 10:15:29 Verilog-AMS SystemVerilog Verilog-A Verilog Synopsys SystemC Functional verification E System on a chip Electronic engineering Hardware description languages Electronic design automation
7	Saber Aerospace Overview Proven Robust Design Solution for Aerospace Mechatronic Systems Saber ® is the proven standard for mechatronic system design and verification. Aerospace design teams worldwide use Saber to devel Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2015-01-29 15:47:57 VHDL-AMS Synopsys Reliability engineering VHDL SystemC SPICE Verilog Aerospace engineering Modeling language Electronic engineering Hardware description languages Electronic design automation
8	AIT Austrian Institute of Technology, the Austrian research institute with European format which focuses on the key infrastructure issues of the future, is looking to strengthen its team with the immediate appointment of Add to Reading List Source URL: www.ait.ac.at Language: English - Date: 2015-02-25 10:10:06 VHDL-AMS VHDL Seibersdorf Austrian Institute of Technology Verilog IEEE Design Automation Standards Committee Hardware description languages Electronic engineering Verilog-A
9	Hidden State in SpectreRF Add to Reading List Source URL: www.designers-guide.org Language: English - Date: 2008-06-02 18:29:26 Ken Kundert Verilog-AMS Verilog SPICE Capacitor Operational amplifier Sample and hold Electronic engineering Hardware description languages SpectreRF
10	Saber Aerospace Overview Proven Robust Design Solution for Aerospace Mechatronic Systems Saber ® is the proven standard for mechatronic system design and verification. Aerospace design teams worldwide use Saber to devel Add to Reading List Source URL: www.synopsys.com Language: English VHDL-AMS Synopsys Reliability engineering VHDL SystemC SPICE Verilog Aerospace engineering Modeling language Electronic engineering Hardware description languages Electronic design automation

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