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j431 Index a acoustic microscopy 406, 407 – bonded wafer thickness, measuring 417
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Document Date: 2014-03-31 21:03:45


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IBM / Fujitsu / NEC / LSI / Asahi Glass Corporation / 3M / Wiley-VCH Verlag GmbH & Co. KGaA / Amkor / Ó 2014 Wiley-VCH Verlag GmbH & Co. KGaA / Intel / Aptina Imaging Corporation / /

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Germany / Belgium / France / Korea / China / /

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AMD / /

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Environmental Issue / Product Issues / /

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alignment tool / chip-to-chip / process technologies / daisy chain / image processing software / energy-dispersive x-ray spectroscopy / bonder tool / technology node shrinkage / chemical resistance / cluster software / dual dicing applications / metal bonding interface / passive device / damage chemicals / yield management / carrier wafer / silicon chips / chemical vapor deposition / minority carrier relaxation / chip-on-chip / technology-based 3D integration / metal direct bonding principle / test element / metal patterns / chemical-mechanical polishing / manufacturing supply chain readiness / carrier separation / pick-and-place equipment / vs. chip-on-chip / analog 3D integration technology / chemical-mechanical grinding / 3D chip / wafer/chip / backside processing / cost management / metal surfaces / temperature material solutions / data processing system / manufacturing / passive devices / chemical / high-volume manufacturing / metal bonding / minority carrier / heterogeneous 3D integration technology / metal oxide layer / chemicals / corrosive chemicals / /

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ISIS / /

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IMC / ASIC / Chinese Academy of Science / /

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Mitsumasa Koyanagi / Peter Ramm / Philip Garrou / /

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CoO / grinder polisher / /

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CEA-Leti / /

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semiconductor / bipolar transistor / developing TSV/3D process technologies / analog 3D integration technology / X-ray / 30 3D chip / tomography / packaging 9 3D IC technology / 3D Process Technology / image processing / process control / 14 CMOS technologies / chemical vapor deposition / CMP / 100 D2D stacking technology / laser / ASIC / MEMS / silicon chips / 37 chip-to-chip / dielectric / spectroscopy / chip-on-chip / simulation / 16 chip-on-chip / 60 heterogeneous 3D integration technology / CVD / 386 DRAM chip / vs. chip-on-chip / integrated circuit / /

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