Accelerating Monte Carlo based SSTA Using FPGA Jason Cong, Karthik Gururaj, Wei Jiang, Bin Liu, Kirill Minkovich, Bo Yuan and Yi Zou Computer Science Department, University of California, Los Angeles Los Angeles, CA 9009

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Date: 2010-02-11 21:54:56 Formal methods Electronic design automation Field-programmable gate array Statistical static timing analysis Static timing analysis Standard cell Application-specific integrated circuit Integrated circuit design Pattern matching Electronic engineering Electronics Integrated circuits		Accelerating Monte Carlo based SSTA Using FPGA Jason Cong, Karthik Gururaj, Wei Jiang, Bin Liu, Kirill Minkovich, Bo Yuan and Yi Zou Computer Science Department, University of California, Los Angeles Los Angeles, CA 9009 Add to Reading List Source URL: cadlab.cs.ucla.edu Download Document from Source Website File Size: 181,08 KB Share Document on Facebook

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