Processor-in-memory

Results: 68



#Item
31GPGPU / Electronics / Computer architecture / Graphics hardware / Computer memory / Multi-core processor / Cell / Graphics processing unit / Memory bandwidth / Computing / Parallel computing / Computer hardware

MAXware: acceleration in HPC R. Dimond, M. J. Flynn, O. Mencer and O. Pell Maxeler Technologies contact:

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Source URL: www.hotchips.org

Language: English - Date: 2013-07-28 00:06:52
32Electronic engineering / Integrated circuits / Digital signal processor / Computer engineering / Direct memory access / Blackfin / Microcontrollers / Electronics

The World Leader in High Performance Signal Processing Solutions ADI’s Revolutionary BF60x Vision Focused Digital Signal Processor System On Chip : 25 Billion Operations/Sec @ 80 mW and Zero Bandwidth

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Source URL: www.hotchips.org

Language: English - Date: 2013-07-28 00:25:37
33Computing / Cell / Instruction prefetch / Hazard / Direct memory access / Computer hardware / Computer architecture / Computer memory

Preventing Synergistic Processor Element Indefinite Stalls Resulting from Instruction Depletion in the Cell Broadband Engine Processor for CMOS SOI 90 nm Applications Note

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Source URL: cell.scei.co.jp

Language: English - Date: 2009-11-06 03:19:04
34Central processing unit / Computer memory / Instruction set architectures / Microprocessors / CPU cache / Cache / MIPS architecture / Microarchitecture / Cell / Computer architecture / Computer hardware / Computer engineering

The Au1000 Internet Edge Processor: TM A High Performance, Low Power SOC The First Chip in a Family of Parts from Alchemy Semiconductor, Inc.

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Source URL: www.hotchips.org

Language: English - Date: 2013-07-27 23:37:56
35Computer engineering / Dynamic random-access memory / CPU cache / Random-access memory / Processor-in-memory / Cache / Microarchitecture / Memory hierarchy / Computer memory / Computer hardware / Computing

Energy/Performance Design of Memory Hierarchies for Processor-in-Memory Chips Michael Huang, Jose Renau, Seung-Moon Yoo, and Josep Torrellas University of Illinois at Urbana-Champaign http://iacoma.cs.uiuc.edu/flexram

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Source URL: iacoma.cs.uiuc.edu

Language: English - Date: 2010-12-27 11:50:27
36Computer architecture / Computing / CPU cache / Cache / PA-8000 / R8000 / AMD 10h / Computer hardware / Central processing unit / Computer memory

Techniques for Mitigating Memory Latency Effects in the PA-8500 Processor David Johnson Systems Technology Division

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Source URL: www.hotchips.org

Language: English - Date: 2013-07-27 22:48:32
37Computing / Computer engineering / The Berkeley IRAM Project / Dynamic random-access memory / Processor-in-memory / POWER5 / Memory controller / Micron Technology / Josep Torrellas / Computer memory / Computer hardware / Computer architecture

FlexRAM: Toward an Advanced Intelligent Memory System A Retrospective Paper Josep Torrellas Department of Computer Science University of Illinois [removed]

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Source URL: iacoma.cs.uiuc.edu

Language: English - Date: 2012-09-12 16:09:20
38Central processing unit / Cache / CPU cache / Microprocessors / Memory hierarchy / Multi-core processor / Computer hardware / Computer memory / Computing

Performance Effects of a Cache Miss Handling Architecture in a Multi-core Processor Magnus Jahre Lasse Natvig Department of Computer and Information Science (IDI), NTNU {jahre,lasse}@idi.ntnu.no

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Source URL: www.nik.no

Language: English - Date: 2007-10-10 07:11:28
39Central processing unit / Cache / CPU cache / Computer memory / Microarchitecture / AMD 10h / Parallel computing / LEON / Speculative execution / Computer hardware / Computer architecture / Computer engineering

The Design Complexity of Program Undo Support in a General-Purpose Processor Radu Teodorescu and Josep Torrellas Department of Computer Science University of Illinois at Urbana-Champaign http://iacoma.cs.uiuc.edu

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Source URL: iacoma.cs.uiuc.edu

Language: English - Date: 2005-10-16 18:49:08
40Computer architecture / Parallel computing / Computer memory / Microprocessors / CPU cache / Cache / Processor register / Superscalar / Multi-core processor / Computing / Computer hardware / Central processing unit

Tradeoffs in Buffering Memory State for Thread-Level Speculation in Multiprocessors  

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Source URL: iacoma.cs.uiuc.edu

Language: English - Date: 2003-06-21 00:18:12
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