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Retiming
Results: 32

#	Item
1	Traffic Management System Efficiency Signal Operation & Management Add to Reading List Source URL: mobility.tamu.edu Language: English - Date: 2015-08-19 17:31:09 Transport Land transport Road traffic management Road transport Traffic signals Traffic law Signal timing Traffic light Traffic congestion Traffic Intersection Retiming
2	Eurographics/ ACM SIGGRAPH Symposium on Computer AnimationM.-P. Cani, J. O’Brien (Editors) Physics-Based Motion Retiming J. McCann, N. S. Pollard, and S. Srinivasa2 Carnegie Mellon University, Pittsburgh Add to Reading List Source URL: graphics.cs.cmu.edu Language: English - Date: 2006-07-30 12:10:17
3	Datasheet DC Ultra Concurrent Timing, Area, Power and Test Optimization Overview Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2015-03-19 18:15:41 Logic synthesis Physical design High-level synthesis Register-transfer level Placement Quality of results Multi-core processor Synopsys Retiming Electronic engineering Electronic design automation Electronics
4	Visit Wohler Technologies at the 2015 NAB Show, Booth SU3116 For additional news items, follow Wohler’s social media sites: http://twitter.com/Wohler http://www.facebook.com/WohlerTechnologies http://www.linkedin.com/c Add to Reading List Source URL: www.wohler.com Language: English - Date: 2015-03-31 09:05:55 High-definition television Subtitling Transcription Retiming Workflow Wormhole Electronic engineering Technology Design Assistive technology Closed captioning Deafness
5	Visit Wohler Technologies at the 2015 NAB Show, Booth SU3116 For additional news items, follow Wohler’s social media sites: http://twitter.com/Wohler http://www.facebook.com/WohlerTechnologies http://www.linkedin.com/c Add to Reading List Source URL: www.wohler.com Language: English - Date: 2015-02-18 10:06:28 Closed captioning Deafness High-definition television Subtitling Workflow Retiming Tachyon Wormhole Physics Time travel Transcription
6	Microsoft Word - speedup10.doc Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2008-04-27 18:18:38 Digital electronics Electrical circuits Electronic design And-inverter graph Field-programmable gate array Static timing analysis Logic synthesis Propagation delay Retiming Electronic engineering Electronic design automation Formal methods
7	1 Scalable Min-Register Retiming Under Timing and Initializability Constraints Aaron P. Hurst, Alan Mishchenko, and Robert K. Brayton University of California, Berkeley Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2008-04-03 12:04:29 Formal methods Mathematics Network flow Retiming Electronic design automation Electronic design Maximum flow problem Design closure Clock skew Electronic engineering Operations research Electronics
8	Efficient FPGA Mapping using Priority Cuts Sungmin Cho Satrajit Chatterjee Alan Mishchenko Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2007-03-13 15:19:16 Electronic design automation Field-programmable gate array Formal methods Electronic design Logic synthesis Combinational logic Retiming Application-specific integrated circuit Lookup table Electronic engineering Electronics Digital electronics
9	Verification after Synthesis Alan Mishchenko Robert Brayton Department of EECS Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2006-05-01 19:34:23 Digital electronics Diagrams Logic in computer science And-inverter graph Retiming Logic synthesis Formal verification Combinational logic Standard cell Electronic engineering Electronic design automation Formal methods
10	Sequential Rewriting and Synthesis Robert Brayton Alan Mishchenko EECS Department, University of California, Berkeley, CA 94720 Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2007-04-23 21:49:16 Logic in computer science Mathematics Formal methods Computer memory Binary trees Retiming Flip-flop Sequential logic Combinational logic Theoretical computer science Digital electronics Electronic engineering

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