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Date: 2015-02-24 17:15:57Integrated circuits Hardware verification languages Synopsys Integrated circuit design Signoff Physical design OpenVera Design rule checking SystemVerilog Electronic engineering Electronic design automation Electronic design | Microsoft Word[removed]3_10-K as printed 2005.docAdd to Reading ListSource URL: www.synopsys.comDownload Document from Source WebsiteFile Size: 594,83 KBShare Document on Facebook |