Drain Induced Barrier Lowering

Results: 15



#Item
1Electronic engineering / Electrical engineering / Electromagnetism / Integrated circuits / Semiconductor devices / Electronic design / Logic families / Electronic circuits / MOSFET / Drain-induced barrier lowering / CMOS / Threshold voltage

2015 20th IEEE European Test Symposium (ETS) ! New Drain Current Model for Nano-Meter MOS Transistors On-Chip Threshold Voltage Test

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Source URL: www.ridgetopgroup.com

Language: English - Date: 2015-08-06 17:54:54
2Drain Induced Barrier Lowering / Technology / Threshold voltage / Field-effect transistor / Multigate device / Work function / Short-channel effect / Charge carriers / Transistors / Electrical engineering / Physics / MOSFET

Precise 2D Compact Modeling of Nanoscale DG MOSFETs Based on Conformal Mapping Techniques T. A. Fjeldly *, S. Kolberg* and B. Iñiguez** * UniK – University Graduate Center, Norwegian University of Science and Technol

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Source URL: www.nsti.org

Language: English - Date: 2012-06-27 17:07:44
3Electrical engineering / Semiconductors / Short-channel effect / Transistor / Field-effect transistor / Electron mobility / Drain Induced Barrier Lowering / Channel length modulation / Power MOSFET / Electronic engineering / Technology / MOSFET

Compact model for ultra-short channel four-terminal DG MOSFETs for exploring circuit characteristics T. Nakagawa*, T. Sekigawa*, T. Tsutsumi**, M. Hioki*, E. Suzuki*, and H. Koike* * Electroinformatics Group,

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Source URL: www.nsti.org

Language: English - Date: 2011-11-18 13:54:24
4Electronic engineering / MOSFET / Threshold voltage / Field-effect transistor / Drain Induced Barrier Lowering / Transistor / Gate oxide / Electrical engineering / Semiconductor devices / Technology

A computationally efficient method for analytical calculation of potentials in undoped symmetric DG SOI MOSFET Oana Cobianu * and Manfred Glesner** Institute of Microelectronic Systems, Darmstadt University of Technology

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Source URL: www.nsti.org

Language: English - Date: 2012-06-27 17:11:59
5Nanomaterials / MOSFET / Subthreshold slope / Threshold voltage / Graphene / Field-effect transistor / Drain Induced Barrier Lowering / Transistor / Leakage / Electrical engineering / Electromagnetism / Physics

Spectra Journal_FINAL.pdf

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Source URL: www.seas.virginia.edu

Language: English - Date: 2014-04-04 11:55:04
6Electromagnetism / Electronic design / Logic families / MOSFET / Drain Induced Barrier Lowering / Threshold voltage / Field-effect transistor / CMOS / IC power supply pin / Electronic engineering / Electrical engineering / Integrated circuits

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOL. 22, NO. 10, OCTOBER[removed]A Compact Transregional Model for Digital CMOS Circuits Operating Near Threshold

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Source URL: www.async.caltech.edu

Language: English - Date: 2014-09-24 17:59:20
7Short-channel effect / UNIK / Multigate device / Field-effect transistor / Drain Induced Barrier Lowering / Threshold voltage / MOSFET

PDF Document

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Source URL: www.nsti.org

Language: English - Date: 2006-06-09 07:22:26
8Threshold voltage / Doping / Electromagnetism / Drain Induced Barrier Lowering / Halo: Combat Evolved / Transistor model / Electrical engineering / Games / Reverse short-channel effect

PDF Document

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Source URL: www.nsti.org

Language: English - Date: 2006-06-09 07:22:03
9Technology / MOSFET / Drain Induced Barrier Lowering / Silicon-germanium / Field-effect transistor / Bipolar junction transistor / IC power supply pin / Threshold voltage / Transistor model / Integrated circuits / Electrical engineering / Electronic engineering

A Unified Process-Based Compact Model for Scaled PD/SOI and Bulk-Si MOSFETs Jerry G. Fossum University of Florida Gainesville, FL[removed]http://www.soi.tec.ufl.edu)

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Source URL: www.nsti.org

Language: English - Date: 2010-03-19 15:18:44
10Chenming Hu / Electromagnetism / Drain Induced Barrier Lowering / Leakage / Soi / Electrical engineering / BSIM / MOSFET

Present Status and Future Direction of BSIM SOI Model for High Performance/Low-Power/RF Application Samuel K. H. Fung, *Pin Su, *Wan Hui, *Chenming Hu IBM Microelectronics, Semiconductor Research and Development Center (

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Source URL: www.nsti.org

Language: English - Date: 2010-03-19 15:20:38
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