Microsoft Word - resume10.doc - Jason Cong - Document - PDFSEARCH.IO

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Date: 2010-03-01 17:23:10 Fabless semiconductor companies Field-programmable gate array Jason Cong Logic synthesis Altera Application-specific integrated circuit Special Interest Group on Design Automation Computing with Memory Synplicity Electronic engineering Electronics Digital electronics		Microsoft Word - resume10.doc Add to Reading List Source URL: cadlab.cs.ucla.edu Download Document from Source Website File Size: 128,27 KB Share Document on Facebook

	FPGA’2013 Panel Are FPGAs Suffering from the Innovator’s Dilemma? Moderator: Jason Cong, UCLA Panelists DocID: 1tkJV - View Document
	An Integrated Technology Mapping Environment Alan Mishchenko Satrajit Chatterjee Robert Brayton Department of EECS University of California, Berkeley {alanmi, satrajit, brayton}@eecs.berkeley.edu DocID: NKBq - View Document
	A Scalable, High-Performance Customized Priority Queue Muhuan Huang,* Kevin Lim+ and Jason Cong* * University of California, Los Angeles Computer Science Department DocID: FVjM - View Document
	Accelerating Monte Carlo based SSTA Using FPGA Jason Cong, Karthik Gururaj, Wei Jiang, Bin Liu, Kirill Minkovich, Bo Yuan and Yi Zou Computer Science Department, University of California, Los Angeles Los Angeles, CA 9009 DocID: FLrG - View Document
	Microsoft Word - resume10.doc DocID: FFoa - View Document