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91	UNITED STATES SECURITIES AND EXCHANGE COMMISSION Washington, D.C[removed]FORM 10-K As filed on December 17, 2010 and amended on February 9, 2011 Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2015-02-24 17:15:58 Hillsboro Oregon Synopsys Digital electronics Mentor Graphics Magma Design Automation Cadence Design Systems Logic synthesis SystemVerilog Signoff Electronic engineering Electronic design automation Electronic design
92	Datasheet Memory Solution Overview Memory products are among the most Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 12:43:58 Integrated circuits Hillsboro Oregon Synopsys Electronic design automation Physical design Integrated circuit design Parasitic extraction Functional verification Signoff Electronic engineering Electronics Electronic design
93	Project Name Here Sole Source Justification ___________________________________________________________________________________________ Add to Reading List Source URL: epmo.vermont.gov Language: English - Date: 2014-03-21 15:14:51 Outsourcing Request for proposal Sales Signoff Business Procurement Auctioneering
94	PC1: Required Items Checklist for Professional Certification Orient and affix BIS job number label here Add to Reading List Source URL: www.nyc.gov Language: English - Date: 2011-02-04 08:57:25 Bounded-error probabilistic polynomial Signoff
95	Synopsys Professional Services Datasheet Design Flow Deployment At-A-Glance `` Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 12:39:43 Integrated circuits Electronic design Digital electronics Synopsys Timing closure Integrated circuit design Design flow Signoff EDA database Electronic engineering Electronics Electronic design automation
96	Synopsys Professional Services Datasheet Tool and Methodology Consulting At-A-Glance `` Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 12:40:16 Signoff SystemVerilog Power optimization EDA database Timing closure Electronic engineering Electronic design automation Synopsys
97	Success Story Synopsys and STMicroelectronics TetraMAX Small Delay Defect ATPG Boosts Test Quality at STMicroelectronics Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 14:32:25 Synopsys Signoff Static timing analysis Electronic engineering Electronic design automation Automatic test pattern generation
98	Quarterly newsletter for Mil/Aero engineers About This Issue The mission of the MTB is to provide important technology information and insights to engineers and managers in Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 12:00:59 Electronic design Integrated circuits Logic design Field-programmable gate array Catapult C Application-specific integrated circuit High-level synthesis Signoff Xilinx Electronic engineering Electronics Electronic design automation
99	Synopsys Professional Services Datasheet Physical Design Assistance At-A-Glance `` Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 12:40:02 Timing closure Synopsys Physical design Design closure Tape-out Integrated circuits Signoff EDA database Electronic engineering Electronic design automation Electronic design
100	Synopsys Professional Services Datasheet Core Optimization Services At-a-Glance `` Add to Reading List Source URL: www.synopsys.com Language: English - Date: 2014-11-07 12:39:15 Integrated circuits Electronic design Signoff Multi-core processor Synopsys Program optimization Compiler optimization Standard cell Integrated circuit design Electronic engineering Electronic design automation Electronics